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翻訳と辞書　辞書検索 [ 開発暫定版 ] スポンサード リンク Phase-locked loop ranges ： ウィキペディア英語版 Phase-locked loop ranges The terms hold-in range, pull-in range, and lock-in range are widely used by engineers for the concepts of frequency deviation ranges within which phase-locked loop-based circuits can achieve lock under various additional conditions. ==History== In the classic books on phase-locked loops, published in 1966, such concepts as hold-in, pull-in, lock-in, and other frequency ranges for which PLL can achieve lock, were introduced. They are widely used nowadays (see, e.g. contemporary engineering literature and other publications). Usually in engineering literature only non-strict definitions are given for these concepts. F. Gardner in 1979 in the 2nd edition of his well-known work, Phaselock Techniques, formulated the following problem () (see also the 3rd edition〔 ()): "There is no natural way to define exactly any unique lock-in frequency". The lack of rigorous explanations led to the paradox: "despite its vague reality, lock-in range is a useful concept" 〔(). Many years of using definitions based on the above concepts has led to the advice given in a handbook on synchronization and communications, namely to check the definitions carefully before using them. First rigorous mathematical definitions were given in. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Phase-locked loop ranges」の詳細全文を読む スポンサード リンク 翻訳と辞書 : 翻訳のためのインターネットリソース Copyright(C) kotoba.ne.jp 1997-2016. All Rights Reserved.